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Title:  Engineer Principal, FPGA

Everyone communicates. It’s the essence of the human experience. How we communicate is evolving. Technology is reshaping the way we live, learn and thrive. The epicenter of this transformation is the network—our passion. Our experts are rethinking the purpose, role and usage of networks to help our customers increase bandwidth, expand capacity, enhance efficiency, speed deployment and simplify migration. From remote cell sites to massive sports arenas, from busy airports to state-of-the-art data centers— we provide the essential expertise and vital infrastructure your business needs to succeed. The world’s most advanced networks rely on CommScope connectivity.

General Summary:

The Principal FPGA Engineer is responsible for design, implementation, and integration of RTL for LTE and 5GNR radio access points.  The FPGA engineer will collaborate with peers across many engineering disciplines on the design of unique programmable logic based wireless solutions.  The engineer will participate with system, hardware, software, and test engineers in architecture, requirements, bring up, design verification testing (DVT) and end-to-end integration of the final product.

 

Duties & Responsibilities:

  • FPGA for high-speed real-time data processing applications
  • Proficiency with VHDL and scripting languages.
  • Experienced in Intel and Xilinx products and development environments.
  • Proficient in AXI and Avalon bus architectures with DMA.
  • Model based design tools such as DSP Builder and System Generator
  • Multi-gigabit design (10Gb/s Ethernet, 25Gb/s Ethernet, JESD204, 10GBASE-R/KR, or similar)
  • Clock domain partitioning, timing constraints rules, static timing closure
  • Hierarchical test bench design
  • Automated vector stimulus input and output vector pass/fail checking
  • ChipScope or SignalTap debugger or equivalent methods
  • Background in Signal Processing and DSP implementation preferred.
  • Implementation knowledge in the following signal processing areas is highly desirable, Digital NCO, Quadrature Modulator and Demodulator, channel filtering, AGC and PLL and loop filters
  • LTE or 5GNR Layer 1 radio implementation with end-to-end system integration experience is preferred.
  • Experience in supporting product development through the entire product lifecycle is highly desirable.
  • Zync Ultrascale SoC or equivalent integrated hard processor with programmable logic device preferred.
  • Demonstrated experience leading, developing and integrating designs in a multi-discipline collaborative engineering environment.

 

Required Skills & Qualifications:

  • BSEE with 12+ or MSEE with 8+ years relevant experience in the design and implementation of high-speed real-time FPGA RTL

It is the policy of CommScope to provide Equal Employment Opportunities to all individuals based on merit, qualifications and abilities. CommScope does not discriminate in employment opportunities or practices on the basis of race, color, religion, gender (including pregnancy), national origin, age or any other characteristics as protected by law. Furthermore, this contractor and subcontractor shall abide by the requirements of 41 CFR 60-300.5(a) and 41 CFR 60-741.5(a). These regulations prohibit discrimination against qualified protected veterans and qualified individuals on the basis of disability, and require affirmative action by covered prime contractors and subcontractors to employ and advance in employment qualified protected veterans and qualified individuals with disabilities.

 


Nearest Major Market: Minneapolis

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